The present invention relates in general to semiconductor integrated circuit devices and to a method for manufacturing such semiconductor integrated circuit devices; and, more particularly, the invention relates to a technique that is effective applied to a semiconductor integrated circuit device provided with two or more MISFET's (Metal Insulator Semiconductor Field Effect Transistor) having gate insulation films that are different in film thickness on the same semiconductor substrate.
In the field of semiconductor device technology, a so-called two-type gate process, in which a gate insulation film having a thin film thickness and a gate insulation film having a thick film thickness are formed in the same semiconductor chip, has been used in practice concomitantly with the popularization of a semiconductor chip having multi-power sources.
For example, Japanese Published Unexamined Patent Application No. 2000-188338 discloses a two-type gate process in which a gate insulation film comprised of silicon oxide and a gate insulation film comprised of silicon nitride are formed on a first region and a second region of a semiconductor substrate, respectively.
In the two-type gate process described in the above-mentioned Patent Application, at first, a first silicon oxide film is formed on first and second regions of a semiconductor substrate, and then the first silicon oxide film on the first region is removed selectively by etching to expose the first region of the semiconductor substrate surface.
Next, a silicon nitride film is formed on the first region of the semiconductor substrate and on the first silicon oxide film on the second region, and then the second silicon nitride film and the first silicon oxide film are removed selectively by etching to expose the second region of the semiconductor substrate surface.
Next, the semiconductor substrate is subjected to thermal oxidation to form a second silicon oxide film on the second region of the semiconductor substrate surface. Thereby, the first gate insulation film comprised of silicon nitride is formed on the first region of the semiconductor substrate surface and the second gate insulation film comprised of silicon oxide is formed on the second region of the semiconductor substrate surface.